IRF7416QPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
?
Circuit Layout Considerations
? Low Stray Inductance
? Ground Plane
? Low Leakage Inductance
Current Transformer
-
+
?
?
-
**
-
?
+
*
V GS *
R G
? dv/dt controlled by R G
? I SD controlled by Duty Factor "D"
? D.U.T. - Device Under Test
+
-
V DD
* Reverse Polarity for P-Channel
** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[ V GS =10V ] ***
D.U.T. I SD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
[ ]
D.U.T. V DS Waveform
Diode Recovery
dv/dt
V DD
Re-Applied
Voltage
Inductor Curent
Body Diode
Ripple  ≤  5%
Forward Drop
[ I SD ]
*** V GS = 5.0V for Logic Level and 3V Drive Devices
Fig 13. For P-Channel HEXFETS
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